Memory maker Rambus has unveiled its Terabyte Bandwidth Initiative with the goal to develop a new memory architecture capable of achieving 1TB/sec bandwidth. The plan is to push the data rate to a whopping 32X —which can provide a 16Gbps signaling rate with a 500MHz clock. Compare that with to the 2bits /1Gbps provided by conventional DDR at the same rate. Add differential signaling an both the data and command/address channels and you have yourself one blazingly fast system.
According to Rambus, graphics and game consoles will push memory bandwidth needs towards 1 TByte/s over the next 4-5 years. Rambus believes that they can achieve the 1TB goal in that time frame using a multi-chip array. There is no doubt that the need will be there sooner or later, but whether Rambus can succeed in this time frame remains to be seen. [Rambus via Electronista]
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